55 [[nodiscard]] std::string
TypeName()
const;
68 std::uint32_t
api = 0;
81 [[nodiscard]] std::string
ToString()
const;
156 [[nodiscard]] std::string
LinkState()
const;
193 [[nodiscard]] std::string
IpStr()
const
232 std::vector<std::tuple<std::uint32_t, std::uint16_t, std::uint16_t, Bytes>>
rawBlocks;
249 std::pair<std::uint8_t, std::uint8_t>
version{1, 0};
266inline std::size_t
Align4(std::size_t offset)
268 return (offset + 3) & ~static_cast<std::size_t>(3);
278 const Bytes& data, std::size_t offset = 0);
299 std::uint16_t subslot = 0);
365 [[nodiscard]] std::string
StateName()
const;
369 [[nodiscard]]
bool IsOk()
const;
399 [[nodiscard]] std::string
StateName()
const;
403 [[nodiscard]]
bool IsProper()
const;
421 [[nodiscard]]
bool AllOk()
const;
426 [[nodiscard]] std::vector<std::tuple<std::uint16_t, std::uint16_t, std::string>>
GetMismatches()
const;
512 Bytes data, std::uint32_t api = 0);
527 [[nodiscard]]
Bytes BuildWriteBlock(std::uint16_t seq, std::uint32_t api, std::uint16_t slot, std::uint16_t subslot,
528 std::uint16_t index,
const Bytes& data)
const;
536 std::array<std::uint8_t, uuidLenght>
arUuid{};
653 std::vector<ExpectedSubmoduleSlot>
slots;
691 std::uint32_t moduleIdent, std::uint32_t submoduleIdent,
692 std::uint16_t submoduleType = 0, std::uint16_t inputLength = 0,
693 std::uint16_t outputLength = 0);
701 std::vector<ExpectedSubmoduleAPI>
apis;
ExpectedSubmoduleBlockReq (0x0104) builder.
Bytes ToBytes() const
Serialize the complete block to raw bytes.
ExpectedSubmoduleBlockReq & AddSubmodule(std::uint32_t api, std::uint16_t slot, std::uint16_t subslot, std::uint32_t moduleIdent, std::uint32_t submoduleIdent, std::uint16_t submoduleType=0, std::uint16_t inputLength=0, std::uint16_t outputLength=0)
Add a single submodule.
std::vector< ExpectedSubmoduleAPI > apis
APIs added so far, each with its own module/submodule list.
static constexpr std::uint16_t expectedSubmoduleBlockReqBlockType
Block type identifier for ExpectedSubmoduleBlockReq.
Builder for IODWriteMultipleReq packets (index 0xE040).
IODWriteMultipleBuilder(std::array< std::uint8_t, uuidLenght > arUuid, std::uint16_t seqNum=0)
Construct a builder for the given AR.
Bytes BuildHeader(std::size_t blocksLen) const
Serialize the outer IODWriteMultipleReq header.
static constexpr std::uint16_t writeMultipleBlockType
Block type used for each nested write block.
Bytes Build() const
Build the complete IODWriteMultipleReq packet.
IODWriteMultipleBuilder & AddWrite(std::uint16_t slot, std::uint16_t subslot, std::uint16_t index, Bytes data, std::uint32_t api=0)
Add a write operation.
static constexpr std::uint16_t writeMultipleIndex
Record data index for WriteMultiple (0xE040).
std::vector< Write > writes
Queued write operations, in the order they'll be serialized.
Bytes BuildWriteBlock(std::uint16_t seq, std::uint32_t api, std::uint16_t slot, std::uint16_t subslot, std::uint16_t index, const Bytes &data) const
Serialize a single nested write block.
std::uint16_t seqNum
Starting sequence number for the outer header.
std::array< std::uint8_t, uuidLenght > arUuid
AR UUID the writes belong to.
ModuleDiffBlock ParseModuleDiffBlock(const Bytes &data)
Parse a ModuleDiffBlock (0x8104) from raw bytes.
PortInfo ParsePdPortDataReal(const Bytes &data, std::size_t offset=0, std::uint16_t slot=0, std::uint16_t subslot=0)
Parse a PDPortDataReal (0x020F) block body.
std::tuple< std::uint32_t, std::uint16_t, std::uint16_t, std::size_t > ParseMultipleBlockHeader(const Bytes &data, std::size_t offset=0)
Parse a MultipleBlockHeader (0x0400) body.
InterfaceInfo ParsePdInterfaceDataReal(const Bytes &data, std::size_t offset=0, std::size_t blockHeaderSize=blockHeaderLenght)
Parse a PDInterfaceDataReal (0x0240) block body.
std::vector< WriteMultipleResult > ParseWriteMultipleResponse(const Bytes &data)
Parse an IODWriteMultipleRes into individual per-write results.
PDRealData ParsePdRealData(const Bytes &data)
Parse a complete PDRealData (0xF841) response.
std::size_t Align4(std::size_t offset)
Round an offset up to the next 4-byte boundary.
RealIdentificationData ParseRealIdentificationData(const Bytes &data)
Parse a RealIdentificationData (0xF000 or 0x0013) response.
std::pair< BlockHeader, std::size_t > ParseBlockHeader(const Bytes &data, std::size_t offset=0)
Parse a 6-byte PROFINET block header at an offset.
std::optional< PortStatistics > ParsePortStatistics(const Bytes &data, std::size_t offset=0)
Parse a PDPortStatistic (0x0251) block body.
BlockType
PROFINET block types.
@ Unknown
Unknown / Initialize value.
@ RealIdentificationData
Real identification data block.
std::string String2Ip(std::span< const std::uint8_t > ipBytes)
Format raw IPv4 address bytes as a dotted string.
std::vector< std::uint8_t > Bytes
Generic byte buffer alias used throughout the library for raw wire data.
constexpr int blockHeaderLenght
Constant lenght of a blockHeader.
std::string Mac2String(const MacAddress &mac)
Format a MAC address as a colon-separated string.
PROFINET protocol wire-format structures and serialization helpers.
Expected submodules for a specific API/slot.
std::vector< ExpectedSubmoduleSlot > slots
Expected slots within this module.
Bytes ToBytes() const
Serialize this API entry to raw bytes.
std::uint32_t api
API number.
Describes I/O data for a submodule (one direction: Input or Output).
std::uint16_t submoduleDataLength
Length in bytes of this direction's cyclic data.
std::uint8_t lengthIops
Length in bytes of the IOPS (provider status) trailer.
std::uint8_t lengthIocs
Length in bytes of the IOCS (consumer status) trailer.
std::uint16_t dataDescription
Data direction: 1 = Input, 2 = Output.
Bytes ToBytes() const
Serialize this description to raw bytes.
One slot with in an api submodule.
std::uint16_t slotNumber
Slot number.
std::uint32_t moduleIdentNumber
Expected module ident number.
std::vector< ExpectedSubmodule > submodules
Expected submodules within this module.
std::uint32_t api
API number.
Bytes ToBytes() const
Serialize this api submodule slot.
std::uint16_t moduleProperties
Module property flags.
Expected submodule within a slot.
std::uint16_t SubmoduleType() const
SubmoduleProperties.Type extracted from SubmoduleProperties.
std::vector< ExpectedSubmoduleDataDescription > dataDescriptions
Data descriptions for this submodule's cyclic data (one per active direction).
Bytes ToBytes() const
Serialize this submodule entry to raw bytes.
std::uint16_t subslotNumber
Subslot number.
std::uint16_t submoduleProperties
Submodule property flags (encodes the I/O direction type).
std::uint32_t submoduleIdentNumber
Expected submodule ident number.
One queued write operation.
Bytes data
Record data to write.
std::uint16_t subslot
Subslot number.
std::uint32_t api
API number.
std::uint16_t index
Record data index to write.
std::uint16_t slot
Slot number.
Interface information from PDInterfaceDataReal (0x0240).
std::array< std::uint8_t, 4 > gateway
Interface IPv4 default gateway.
std::string GatewayStr() const
Format Gateway as a dotted string.
std::string chassisId
LLDP chassis ID.
std::array< std::uint8_t, 4 > subnetMask
Interface IPv4 subnet mask.
std::array< std::uint8_t, macAddressLength > macAddress
Interface MAC address.
bool operator==(const InterfaceInfo &) const =default
Compares two InterfaceInfo for equality.
std::array< std::uint8_t, 4 > ipAddress
Interface IPv4 address.
std::string MacStr() const
Format MacAddress as a colon-separated string.
std::string IpStr() const
Format IpAddress as a dotted string.
std::string SubnetStr() const
Format SubnetMask as a dotted string.
Parsed ModuleDiffBlock (0x8104).
std::vector< ModuleDiffModule > modules
Modules described by this block.
bool AllOk() const
Whether every module and submodule matches the expected configuration.
bool operator==(const ModuleDiffBlock &) const =default
Compares two ModuleDiffBlock for equality.
std::vector< std::tuple< std::uint16_t, std::uint16_t, std::string > > GetMismatches() const
List every non-OK module/submodule.
Difference info for a single module (slot).
std::vector< ModuleDiffSubmodule > submodules
Submodules within this module.
std::uint32_t api
API number.
bool operator==(const ModuleDiffModule &) const =default
Compares two ModuleDiffModule for equality.
std::uint16_t moduleState
Module state (see MODULE_STATE_* constants).
bool IsProper() const
Whether this module matches the expected configuration.
std::uint16_t slotNumber
Slot number.
std::uint32_t moduleIdentNumber
Actual module ident number found by the device.
std::string StateName() const
Human-readable name for ModuleState.
Difference info for a single submodule.
std::string StateName() const
Human-readable name for SubmoduleState.
std::uint16_t subslotNumber
Subslot number.
bool IsOk() const
Whether this submodule matches the expected configuration.
bool operator==(const ModuleDiffSubmodule &) const =default
Compares two ModuleDiffSubmodule for equality.
std::uint32_t submoduleIdentNumber
Actual submodule ident number found by the device.
std::uint16_t submoduleState
Submodule state (see SUBMODULE_STATE_* constants).
Parsed PDRealData (0xF841) structure.
std::optional< InterfaceInfo > interface
Interface information, if a PDInterfaceDataReal block was found.
bool operator==(const PDRealData &) const =default
Compares two PDRealData for equality.
std::vector< SlotInfo > slots
Slots discovered in the response.
std::vector< PortInfo > ports
Port information for each port found.
std::vector< std::tuple< std::uint32_t, std::uint16_t, std::uint16_t, Bytes > > rawBlocks
Raw (api, slot, subslot, MultipleBlockHeader payload) tuples, one per slot.
LLDP peer information from PDPortDataReal.
bool operator==(const PeerInfo &) const =default
Compares two PeerInfo for equality.
std::string portId
Peer's LLDP port ID.
std::array< std::uint8_t, macAddressLength > macAddress
Peer's MAC address.
std::string chassisId
Peer's LLDP chassis ID.
std::string MacStr() const
Format MacAddress as a colon-separated string.
Port information from PDPortDataReal (0x020F).
bool operator==(const PortInfo &) const =default
Compares two PortInfo for equality.
std::uint32_t multicastBoundary
Multicast boundary flags.
std::string portId
LLDP port ID.
std::string MauTypeName() const
Human-readable name for MauType.
std::uint16_t mauType
MAU type (media attachment unit) code.
std::uint16_t slot
Slot number.
std::uint32_t domainBoundary
Domain boundary flags.
std::vector< PeerInfo > peers
LLDP peers discovered on this port.
std::uint8_t linkStatePort
Port-level link state.
std::uint32_t mediaType
Media type code.
std::uint16_t subslot
Subslot number.
std::string LinkState() const
Human-readable name for LinkStateLink.
std::uint8_t linkStateLink
Link-level link state.
Parsed PDPortStatistic (0x0251) counters.
std::uint32_t outDiscards
Transmitted discarded frame count.
std::uint32_t outOctets
Transmitted octet count.
std::uint32_t inErrors
Received error frame count.
std::uint32_t inDiscards
Received discarded frame count.
std::uint32_t inOctets
Received octet count.
std::uint32_t outErrors
Transmitted error frame count.
std::uint16_t counterStatus
Counter validity status.
Parsed RealIdentificationData (0xF000/0x0013) structure.
std::vector< SlotInfo > slots
Populated slots/subslots.
std::pair< std::uint8_t, std::uint8_t > version
Block format version (determines v1.0 vs v1.1 layout).
Slot/subslot discovered from a device.
std::uint32_t moduleIdent
Module ident number.
std::vector< std::string > blocks
Names of nested blocks found for this slot (e.g. "PDPortDataReal").
std::uint32_t submoduleIdent
Submodule ident number.
std::string ToString() const
Human-readable summary of this slot.
std::uint32_t api
API number.
std::uint16_t slot
Slot number.
std::uint16_t subslot
Subslot number.
bool operator==(const SlotInfo &) const =default
Compares two SlotInfo for equality.
Result of a single write within a WriteMultiple operation.
std::uint16_t subslot
Subslot number.
std::uint32_t api
API number.
std::uint32_t status
PNIO status code (0 = success).
std::uint16_t index
Record data index written.
bool Success() const
Whether this individual write succeeded.
std::uint16_t additionalValue1
Additional status value 1 (device-specific).
std::uint16_t seqNum
Sequence number of this write within the batch.
std::uint16_t additionalValue2
Additional status value 2 (device-specific).
std::uint16_t slot
Slot number.